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Thursday, May 21, 2020 | History

4 edition of Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits found in the catalog.

Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits

Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits

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Published by National Aeronautics and Space Administration, Langley Research Center, National Technical Information Service, distributor in Hampton, Va, [Springfield, Va .
Written in English


Edition Notes

Other titlesSpecification and verification of gate level VHDL models of synchronous and asynchronous circuits.
StatementDavid M. Russinoff.
SeriesNASA contractor report -- 191608., NASA contractor report -- NASA CR-191608.
ContributionsLangley Research Center.
The Physical Object
FormatMicroform
Pagination1 v.
ID Numbers
Open LibraryOL17788793M
OCLC/WorldCa32874928


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